Simple Low Cost Open Source UHF RFID Reader

This page presents a simple low-cost SDR RFID UHF reader capable of reading a tag in real time. This work is a direct continuation of the initial design proposed in. This reader is designed around a simple asynchronous OOK modulator in transmission and an envelope detector in reception. All tasks specific to the RFID protocol including clock recovery, data recovery and frame detection are handled in software by a Arduino Uno micro-controller. This reader is able to generate any RFID command supported by the protocol and to decode any message backscattered by the tag in real time. The details of hardware and software associated with this reader are released in open source for the community.

Information presented in this page has been directly extracted from . Source code of this project is included in a Github repository. This page also included some additional information added by other researchers.

Introduction

Radio Frequency Identification (RFID) is an essential technology to identify items reliably. First standard, GS1 EPC Radio-Frequency Identity Protocols Generation-2 UHF RFID Standard also known as {ISO 18000-6c} has been ratified in 2004 and later updated to version 2. Since then, readers and tags compliant with the standard have been developed by different companies for all world regions. At this time, typical flexible UHF tag cost is between $0.1 to $1 depending on the quantity. However the cost of even a low-performance short-range reader can be on the order of $200 which slows down academic experimentation with this technology. The high price of a UHF reader is mainly due to the development of complex reader chips which integrate both analog and digital circuits into a single component. Nowadays, most RFID readers are based on these RFID chips.

Also, reader chips do not offer a viable solution to study and understand the RFID protocol since the API provided to the developer (or the user) is significantly different compared to the air interface. For most of the chips, an inventory round can be summarized as: 1) sending some commands to the chip over a high speed serial interface to configure the chip and start the inventory round, and 2) reading the EPC values detected by the chip and stop the inventory. Note that all the operations between these two steps are actually hidden from the user which significantly limits the understanding of the messages exchanged during the inventory.

Moreover, current Gen2 protocol offers a rich set of parameters to define a communication between the reader and the tags. However, parameter values are usually constrained by the chip design or simply not available from the API to limit the reader chip complexity and lower its cost. For example, the standard specifies any Tari value (which is linked to the reader data rate) between 6.25 and 25 us~\cite[Section 6.3.1.2.4]{iso}. However, for example, the AMS 3993 chip~\cite{ams} only supports Tari values of $6.25$, $12.5$ and $25$~\si{\micro}s. Another example comes from timing information. The range of the parameter $\text{T}_{\text{2}}$~\cite[Table 6-16]{iso} (which corresponds to the time between the end of a reader command and the beginning of the tag reply) is specified by the standard but this value is not exposed by the API of any reader chip and remains unavailable to the user. Similar remarks apply to most of the other parameters of the air interface.

Software Defined Radio (SDR) is a recent paradigm allowing to realize most of the operations of a transceiver in software. SDR designs can potentially offer a lower cost architecture and a higher flexibility since most of the modification can be realized by changing only the software. However, any UHF SDR reader has to face two main challenges in order to successfully read a UHF tag which are not present in classical wireless communication systems. The first one is to mitigate the important variation for the tag Backscatter-Link Frequency, (BLF) since EPC Gen 2 allows significant variation as high a $\pm 22$\% of the BLF~\cite[Table~6-9]{iso}). The second one is to satisfy the timing constraints for issuing reader replies which can not be higher than $20\,\text{T}_{\text{PRI}}$~\cite[Table~6-16]{iso} where $\text{T}_{\text{PRI}}=1/\text{BLF}$. These two issues need to be carefully handled by the reader to realize a successful tag reading. Different designs can be found in the literature, but all are based on FPGA to handle the heavy processing required at the physical layer. Researchers mainly investigated two directions. The first one is based on the USRP platform developed by Ettus Research~\cite{buettner2009flexible,6094207,ars-11-107-2013,7120382}. In all these designs, the FPGA is simply used to interpolate and decimate the transmitted and received signal. All processing steps have to be done on a remote computer (including clock recovery, data recovery, frame detection, etc) and are mainly limited by the timing constraint of the RFID protocol. The other direction is to use the FPGA (or a DSP) to process the heavy tasks of the RFID protocol~\cite{7862269,4224557,10.5555/1390576.1390580,Langwieser08amodular,intercept,robust,7332391}, these architectures allow also to use simpler micro controllers (MCU) to process the remaining tasks and are less limited by the timing constraints, but remains complex due to the FPGA development. For example, the design presented in~\cite{8376193,9343782}, which is by far the smallest FPGA design, uses more than 2000 logical cells.

SDR architecture also allows educational perspective since the associated code can easily be understood and modified to realize new functions and cover new applications. While some SDR tag designs based on simple micro-controllers are already available for the community~\cite{4539485,8719280,6718133}, no simple SDR reader allowing to read a UHF tag has been reported in the literature.

In this paper, we fill the gap and present a simple low-cost SDR reader which is able to realize a complete inventory of a UHF tag. This paper is a direct continuation of the initial design presented in~\cite{pavel}. The proposed reader is theoretically able to generate any commands defined by the standard and to process any response from the tag in real time. In transmission, each parameter of the protocol can be set at any value (including values outside of protocol specification). In reception, this reader is able to extract the complete timing information associated to the message backscattered by the tag. The hardware architecture used by the reader is exactly the same as the one proposed in~\cite{pavel}. Compared to~\cite{pavel}, this paper provides the firmware where all tasks specific to the RFID protocol (including clock recovery, data recovery, frame detection...) are entirely defined in software and can be successfully processed by any low-performance micro-controller. The proposed implementation is based on an Arduino platform which includes $8$~bits/$16$~MHz MCU. This platform is at least two orders of magnitude less powerful than any other SDR design proposed in the literature but is sufficient to realize a fully functional RFID reader. Moreover this reader can be used to investigate the RFID protocol in a practical way by directly generating the different commands and analyzing the tag responses. It can also be used to evaluate the compliance of any UHF tag. The last point addressed by this paper is to encourage any researcher, student or person aiming to study the RFID technology to reproduce, use and improve the proposed design. For that, all hardware design files (including schematic, PCB layout, bill of material) and software design (including firmware code source) are released in open source to the community~\cite{git}.

The rest of the paper is divided in three main Sections. In Section~\ref{archi}, the architecture of the reader in both transmission and reception is presented. The partitioning between hardware and software is also described and the principle and performance of the different sub-systems are characterized. Section~\ref{use} presents the results associated to a complete inventory in different conditions. Finally, Section~\ref{perf} provides the performance and gives perspectives of the proposed design.